This invention relates to architectures for integrated circuit packages which enhance the packages' testability, and it relates to methods of testing such packages for electrical shorts and open circuits.
Typically, an integrated circuit package is comprised of several thin flat layers of ceramic which are laminated together to form the body of the package. One or more integrated circuit chips are epoxyed to the package body at respective chip attach regions. Electrical signals are sent between the chips and signal pads on the package via discrete bonding wires; and from there, signals are sent to I/O pins (input/output pins) via a set of conductors which are routed internal to the package body.
To avoid wasting good chips in a defective package, the conductive paths between the input/output pins and the signal pads are usually tested for shorts and opens before the integrated circuit chips are epoxyed to the package. In the prior art, this test is performed by placing the input/output pins of the package in a socket; and by simultaneously contacting all of the signal pads with respective probes through what is called a "bed of needles". One such bed of needles is sold, for example, by CerProbe Corporation of Tempe, Ariz.
During this test, electrical signals are sent from the I/O pins through the package conductors to the signal pads and through the bed of needles. Also, in those integrated circuit packages which hold multiple chips, some of the signal pads are often connected together via another set of conductors in the package without going to any I/O pin; and such package conductors are tested by sending electrical signals through them and their signal pads via two different probes in the bed of needles.
However, one problem with the above described testing method is that misalignment can occur between the bed of needles and the signal pads; and that in turn will cause an erroneous test. Such misalignment occurs because the signal pads are quite small (e.g., four mils with four mils spacing), and because various manufacturing tolerances occur in the package and the bed of needles. For example, a ceramic package has a certain amount of shrinkage (typically .+-.10 mils per inch); a ceramic package also has a certain amount of non-flatness (typically .+-.4 mils per inch); and the location of the probes on the bed of needles has a certain amount of of misregistration (typically .+-.2 mils per inch).
Also, damage can occur to the signal pads when they are contacted by the bed of needles. For example, the signal pads can be scratched, and that in turn will reduce the package's reliability. Further, the bed of needles and its associated fixturing is quite expensive. Typically, just one bed of needles costs about $10,000; its fixturing costs about $50,000; and a different bed of needles is needed for each different type of package since its probes must coincide with the signal pads on the package.
Accordingly, a primary object of the invention is to provide a new and improved integrated circuit package in which all of the above problems are overcome.